1. Field of the Invention
The present invention relates to a semiconductor device such as an image sensor and a method for manufacturing the semiconductor device.
2. Description of the Related Art
In recent semiconductor integrated circuits, silicidation is performed generally to improve the operating speed. In the silicidation, e.g., the surface of a gate electrode and the surface of a diffusion layer (source/drain) of a MOS integrated circuit react with refractory metals such as titanium, cobalt, and nickel to form a silicide. When the surfaces of the gate electrode and the diffusion layer (source/drain) are silicided, the MOS integrated circuit can achieve a lower resistance and a higher operating speed. Along with a demand for improving the device properties or reliability, there is a tendency to separate a region where a silicide is formed from a region where no silicide is formed in one chip. This technique also is used in a semiconductor device with a smaller chip size such as an image sensor.
FIG. 14 is a schematic view showing an example of the configuration of an image sensor. The image sensor includes a semiconductor substrate 200, a pixel region 202, and peripheral circuit regions 203. The pixel region 202 and the peripheral circuit regions 203 are formed on the semiconductor substrate 200. The peripheral circuit regions 203 include a driving circuit for driving the pixel region 202, a signal processing circuit, and the like. Each of the driving circuit, the signal processing circuit, and the like includes a FET (field-effect transistor) with a MOS structure. The pixel region 202 includes a plurality of pixels 201 in a two-dimensional array, and each of the pixels 201 includes a photodiode.
FIG. 15 shows a cross section of the pixel structure. A diffusion layer 116 of an N-type photodiode is provided in a P-type semiconductor substrate 200. A transfer gate 117 of a MOS transistor is formed in the vicinity of the diffusion layer 116. In FIG. 15, an N-type diffusion layer (floating diffusion amplifier) 118 is located near to the opposite side of the transfer gate 117 from the diffusion layer 116. An isolation film 104 is located near to the opposite side of the diffusion layer 116 from the transfer gate 117. The isolation film 104 is provided in the semiconductor substrate 200. Wiring 101 is formed on the isolation film 104. A polysilicon film is used mainly for both the transfer gate 117 and the wiring 101.
In recent years, the pixel size (i.e., the area of a pixel) of an image sensor has become progressively smaller so that the image sensor can be installed, e.g., in a cellular phone or digital still camera. Moreover, each pixel 201 (FIG. 14) requires a sidewall spacer 103 that is in contact with a side of the wiring 101 in addition to the diffusion layer 116 of the photodiode, the transfer gate 117, and the wiring 101.
The structure of the sidewall spacer 103 is the same as that of a sidewall spacer of the MOS transistor in the peripheral circuit region 203 (FIG. 14). The MOS transistor in the peripheral circuit region 203 (FIG. 14) employ a LDD (lightly doped drain) structure and thus can suppress degradation caused by hot carriers.
In each pixel 201 (FIG. 14), a silicide layer 105 is formed to reduce a resistance of the transfer gate 117 or the wiring 101. The silicide layer 105 is formed not only on the surfaces of the wiring 101 and the transfer gate 117, but also on the source/drain surfaces (not shown in FIG. 15) of the transistor (except for the transfer gate 117) of the pixel and the transistor of the peripheral circuit region 203 (FIG. 14).
It is well known that the sidewall spacer 103 can be formed in the following manner: a SiO2 insulating film is formed on the transfer gate 117 and the wiring 101, and then the insulating film is etched back by anisotropic etching. The anisotropic etching is performed while an insulating film 102 that is arranged directly above the diffusion layer 116 is covered with a resist pattern so as to avoid the formation of a damaged layer in the diffusion layer 116 due to etching (see, e.g., JP 2002-190586 A). When a damaged layer is formed in the diffusion layer 116, a part (ΔQ) of charge (Q) that has been generated by photoelectric conversion and stored in the diffusion layer 116 is lost as a leakage current. Consequently, the saturation characteristics such as the sensitivity of an image sensor are reduced, which in turn degrades the pixel characteristics of the image sensor.
Next, a method for manufacturing the image sensor will be described specifically with reference to FIGS. 16 and 17. FIG. 16 shows the state before an insulating film 108 is etched back by anisotropic etching. FIG. 17 shows the state after an insulating film 108 is etched back by anisotropic etching. In this case, FIGS. 16 and 17 are enlarged cross-sectional views of the wiring 101 and its surroundings in a pixel of the conventional image sensor as shown in FIG. 15.
As shown in FIG. 16, a resist pattern 110 is formed as a mask on the insulating film 108 so as not to cover the wiring 101 and a portion of the insulating film 108 that serves as a sidewall spacer 108b (FIG. 17). The layout of a photomask for forming the resist pattern 110 is designed in view of an alignment deviation (error) of the photomask. Specifically, the alignment deviation includes deviations of the photomask toward the wiring 101 and toward the diffusion layer 116. Therefore, as shown in FIG. 17, the isolation film 104 is large enough to ensure a margin 106 and a margin 107.
However, such an increase in size of the isolation film 104 to ensure the margins 106, 107 makes the diffusion layer 116 of the photodiode smaller. As the diffusion layer 116 of the photodiode is reduced in size, the amount of charge generated by photoelectric conversion in the diffusion layer 116 is reduced, which interferes with an improvement (higher performance) of image sensitivity. Moreover, it is necessary to avoid etching damage to the diffusion layer 116 during anisotropic etching. Therefore, the conventional method, in which the resist pattern 110 is formed so as not to cover the wiring 101 and a portion of the insulating film 108 that serves as the sidewall spacer 108b (FIG. 17), cannot place the diffusion layer 116 closer to the isolation film 104 to miniaturize the image sensor further. Thus, it is difficult for the conventional image sensor to achieve a smaller size and higher performance.
The above problems are not specific to the conventional image sensor, but common to other semiconductor devices including a sidewall spacer and a diffusion layer located in the vicinity of the sidewall spacer.